SiFive
Hyderabad, India
1 years
Engineer 1
6-7 LPA
Stand out. Get hired.
80% of applicants fail the initial ATS screen. Check your compatibility before you apply and stand out from the crowd.
**About the Role:** As an Engineer I in the Hardware Engineering (DV) group, you will be part of a world-class team verifying complex CPU pipelines and memory subsystems. Your primary focus will be ensuring the architectural and microarchitectural correctness of the Memory Management Unit (MMU). This is an excellent opportunity for a recent graduate or early-career engineer to build deep expertise in advanced CPU verification and RISC-V architecture. Key Responsibilities: • MMU Verification: Par
Take the next step in your career. Apply directly on the company's platform.
Apply for this role